Introduction to Interconnect Stress Test
Application Note AP301
How Does IST testing work?
IST works on the principle of driving a test coupon through a rapid thermal cycle between ambient temperature (21°C) and 150° C followed by forced air cooling back to ambient temperature.As the coupon thermal cycles, changes in circuit resistance are monitored. An increase of 10% is considered a failure and testing stops. Thus IST stops the testing (stress) at exactly the time of failure.
Testing temperatures can be raised to 260°C (for the new lead free processes)
The test is dependent on the design of a coupon that reflects the boards attributes including critical hole size, copper weights, layer counts, interconnection types, etc. The coupon is designed with two discrete circuits – power and sense. The power circuit is used to heat the coupon and test post integrity. The sense circuit is measured to monitor resistance changes in the PTH or PTV (plated through via). The sense circuit does not receive significant power. On the power circuit there is no power applied to the central zone (middle portion) of the PTH or PTV.
Ideally the total resistance of the coupon must fall within a range of 300 to 1000 micro-ohms. To achieve this requirement, line widths are defined by the test equipment needs. This requirement will permit testing of future products to achieve lead-free temperature extremes (235°C).
There are a number of coupon designs available; PWB recommends the use of a generic design file that is flexible and useful in most applications. However, there are a number of existing designs that represent existing PCB strategies. Generic coupons have dual sense and dual power circuits allowing the greatest test flexibility. There are a number of specialized coupon designs available on PWB's website for specific requirements. Custom designs can be developed for testing unique applications within the PCB.
What is IST Testing?
Interconnect Stress Test (IST) is an accelerated stress test method used to evaluate the integrity of the printed circuit board (PCB) interconnect structure. It's an objective test whose results are timely, repeatable, reproducible and unique.
IST creates a thermal cycle that stresses a specifically designed coupon, while simultaneously monitoring the electrical integrity of plated through holes (PTHs) and internal interconnects (posts).
It's a test method that measures the integrity of different areas of the same structure – IST tests the PTHs and the posts at the same time. IST automatically produces data that can help determine the PCB's ability to withstand the rigors of assembly, rework and the end use environment. IST gives a critical evaluation of a board's quality and insight to the possible modes of failure.
IST is an IPC approved (TM-650 2.6.26) test method; it's experiencing rapidly growing acceptance by most major OEMs, CEM and PCB manufacturers as a definitive method for the measurement of PCB interconnect integrity.
How is a coupon tested?
The power circuit heats the coupon to 150°C using DC current. At the same time the resistance of the sense circuit is monitored. Typically, the test is run until resistance in either circuit increases by greater than 10% or 1000 cycles are completed. The sense circuit is designed to facilitate the measurement of low-level changes in resistance during thermal cycling. A 10% increase in resistance is considered a failure and the test is stopped before too much damage is caused to the coupon (damage to the coupon can reduce the ability to detect root causes of failure).
What sort of data does a test produce?
The system displays the resistance activity graphs in real time, showing individual thermal cycles and accumulated cycle data. Data analysis is simplified using automated graphing tools throughout each cycle. Additional data collection is completed on the upper stages of heating and the lower stages of cooling.
Data collected during the test includes the number of cycles to failure or finish, resistance of each circuit and resistance at both high and low temperature. Evaluation of the data can indicate the mode of failure and the integrity of the circuit.
The results are compared to an historical baseline of similar products. This gives a quantification of how performance compares to an industry, customer or internal requirement.
Why do we perform IST?
The main reason OEM, CEM and PCB fabricators are adopting IST as the preferred method of PCB testing is the savings in cost and time. IST costs less to complete accelerated stress testing, and, at the same time, is a more comprehensive test that is representative of the board reliability during assembly, rework, and the end use environments. IST is an objective and comprehensive test method with repeatable and reproducible results.
IST tests hundreds of hole and interconnections so statistically the tests are more representative of the quality of the board.
IST testing stops before catastrophic failure and damage is created. This allows for thermal imaging to be used to find the failing area and permits a cross section evaluation of the exact failure location within the coupon.
Other test method have significant limitations. Cross section analysis is work intensive and requires skilled preparation and subjective evaluations. It is limited to a random test and not to evaluation for delamination and is not representative of today's assembly environment – and there is the burden of having to use toxic lead. Thermal Cycling is more expensive and slower and does not allow the advantage of differentiating between PTH and post interconnect failures.
What are the benefits of IST?
IST allows quick time to results. It allows accelerated testing in a timeframe when the need to know is critical. It's faster than thermal cycling and many times faster than other test methods.
IST removes ambiguity in results. Results reflect the quality of hundreds of PTH and interconnections so there is a good probability of finding random and latent quality issues. The test allows a much closer emulation of the assembly, rework and end use environments, including the lead free temperature levels.
IST stops before catastrophic failure, so a critical evaluation of the underlying defect can be made. The combination of IST and thermal imaging greatly improves the user's ability to find and evaluate failure modes.
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Polar Instruments Ltd
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