Testing controlled impedance boards test coupons or built-in test traces?
Application Note AP8502 

Testing controlled impedance boards – should you use test coupons or built-in test traces?


If after reading this you still feel your specific application requires on board testing, please note this is possible with the CITS880s and the Polar GDPS groundless differential probes designed especially for on board testing where ground point access is difficult or impossible.

Why use coupons for impedance testing?

A question we're often asked: Should you test controlled impedance boards on the board traces themselves or on a separate coupon?

Some PCB fabricators insist their customers want to "test their boards on the actual controlled impedance traces" and while the current copy of IPC2141 states that this is acceptable it's usually easier to verify a board by probing traces on a test coupon than on the densely packed PCB itself. In many cases the on-board traces are simply inaccessible, lacking proper test pads, etc.

The accuracy of impedance testing directly on the board, however, may be compromised, by, for example, separation within plane layers or splits in planes (leading to crosstalk and increased inductance as a result of long return current loops). In addition, traces on the board may well be shorter than the IPC recommended test length (150mm / 6 inches) and branch to several circuit components and to other layers through vias.

Test coupons

If you do decide to test with coupons, you'll need to ensure test coupon trace routing matches the board routing, including trace width and spacing rules, and should include ground traces. Generally, signal traces should be straight and open-ended with suitable signal and ground pads for probing (this will imply pads for every reference plane for striplines.) Boards and their associated coupons should also be serial numbered so they can be tracked after separation.

Coupons can be standardized in size, shape, probe pinout, etc., to allow the fabricator to build test fixtures that will facilitate – and accelerate – testing.

You can design coupons as part of the main board but you will normally place coupons at one or more locations on the panel, and you can use a variety of styles, depending on probes and associated test equipment, the land pattern matching the test probes in use. Some patterns are shown below.

Coupon style 1

Connecting reference planes

Another important reason for using coupons is that the reference planes for striplines (and other structures such as a pair of offset striplines) can be connected together to create a common connectable reference GND return path for the signal. (This is why guard traces, where used, are often "stitched" with vias to the GND plane at very regular intervals.)

Think of how the field in the stripline is spread between the near reference plane and the far reference plane. If on the actual bare board you test such structures these will not be connected together as these planes are designed to be at a different DC potential on the loaded board, e.g. VCC+, VCC– & GND etc., but they are still used to create the transmission line structures.

The (bare) board test trace connection points will be the signal trace and one other near GND pad (but not necessarily the other reference plane, unless these are shorted together, which is not always easy to achieve without damaging the board).  On the actual loaded board these planes (VCC+, VCC– & GND) act as "AC GND" and are electrically shorted together by the internal resistance of the PSUs and the mass of decoupling capacitors placed at key points on the loaded board.

On a panel, this is why coupons and boards have copper voids surrounding them, otherwise they connect all the planes together on a panel making bare board isolation testing more demanding.

Using coupons

Coupons are the best way to measure and characterise the process unless testable trace structures have been carefully designed and built into the board for bare board impedance testing.  Microstrips are typically the best example of this as there is just one plane to reference to and the signal trace to GND connection points can be controlled.

Coupon style 2

In addition, real board traces may suffer from design effects such as crosstalk and "swiss cheese" reference planes with voids and poor (i.e. high inductance and/or high capacitance) connection points that exacerbate the TDR aberrations and the impedance discontinuity at the end of probe and for the first few hundred pico seconds into the measurement waveform.

150mm / 6" trace coupons provide a known and well behaved test vehicle for comparing measurements between different board designs and versions making process control simpler for the manufacturer.

Coupon SMA style

If you start testing different traces on an actual board then you should really correlate the results over many traces and then you should be better able to decide whether any observed variations are due to the different traces or due to material or process variances that the manufacturer is trying to control.

Beside the widely employed impedance test and measurement, here are other tests that use coupon test methods, including time delay testing using 3" to 6" trace length differences to calculate propagation delay.


Many authorities promote the use of test coupons for controlled impedance testing because if the coupons fail – or even if they pass – impedance testing it is still possible to microsection the coupon without damaging the pcb itself so in the event the customer does accept a marginal board the coupon can be analysed without damage to the board itself.

There are thus very sound proven reasons to use coupons. You can speed up and simplify impedance coupon generation with CGen PCB controlled impedance coupon generator. CGen PCB works both stand alone and can import stackups from Speedstack.

See also:

AP124 Testing Controlled Impedance Boards with Test Coupons

AP132 Controlled impedance – design for test

CGen PCB – Impedance coupon generator – stand alone impedance coupon generator – also works with Polar's Speedstack stackup design tool and documentation system.