Using Speedflex to document stacks with coated and uncoated areas

Using Speedflex to document stacks with coated and uncoated areas

Application Note AP524

 Documenting specialized stackups

Question:
Is it possible to model a stackup where some areas are coated with resist and other areas deliberately left uncoated?
- Speedstack customer

Answer:
Very easily! - with Speedstack's optional Speedflex Navigator.

In this note you will see how Speedstack's Speedflex Navigator can document a stackup where the board includes areas that are coated with photoresist and surface traces that remain exposed.

First, consider each finished stack in Speedstack's Stack Editor below:

Uncoated stack
Uncoated stack

Coated stack
Coated stack

Start by creating the uncoated stack in the Stack Editor, then press F4 to open the Speedflex Navigator

Uncoated stack
Uncoated stack area

This "Master" stack represents the uncoated area; right click the Navigator and use the Addstack command to add a copy of the Master and name it "Coated". Click the new stack and return to the Stack Editor to add the photoresist and ident layers - the Navigator should display both areas as separate stacks (below).

Navigator showing coated and uncoated areas
Uncoated and coated areas in Speedflex Navigator

This example creates controlled impedance structures in both coated and uncoated areas: the uncoated areas use Surface Microstrip structures and in the coated areas Coated Microstrip structures, shown in Speedstack's controlled impedance tab pane below.

Surface microstrip
Coated microstrip
Controlled impedance structure for uncoated area
Controlled impedance structure for coated area

Use Speedstack's goal seeking facility to arrive at the trace widths for the two structures:

Uncoated layer section
Uncoated Layer 1 in Stack Editor

Coated layer section
Coated Layer 1 in Stack Editor

Speedflex Navigator opens up not only the capability of documenting flex-rigid stacks but also allows you to document alternative stackups that are outside of the standard Speedstack capability. In the above example our customer needed to produce a board which had areas intentionally free from resist on the finished board. This application of Speedflex would be equally applicable should a fabricator wish to predict the impedance of surface traces on a part finished board prior to the application of resist.

Contact Polar now and discover the benefits of documenting and designing your PCB stackups with Speedstack and Speedflex: