PCB stackup, signal integrity and controlled impedance
Featured product – LA9000 S-Parameter Analysis
Comparing simulated and measured insertion loss with LA9000 S-Parameter analysis
PCB signal integrity, PCB stackup, impedance design, test and documentation
Field solving design systems compute parameters for lossless or lossy line impedance, taking into account high-frequency dielectric loss and copper surface losses using Huray, Groisse or Hammerstad methodologies.
PCB stackup design and documentation integrates seamlessly with the field solvers to include transmission line data in the final board stackup report. Extensive suppliers material libraries are available on-line.
Transmission line test systems support conventional impedance measurements as well as SPP, SET2DIL and Delta-L methods for measurement of insertion loss.
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Technical know how
Probably the most comprehensive on line resource of impedance and insertion loss production related technical information and application notes on the web backed up by a staff with decades of in-depth industry experience.
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