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|Application Note 106
PCB Test — Enhancing
nodal impedance analysis
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faults on address and data bus lines
When testing PCBs for faults on address or data bus lines the PFL operator needs to bear in mind that most bus-based devices will incorporate some form of input protection, usually similar to the simplified configuration shown below.
Typical address/data line showing input protection diodes
The diodes will present an open circuit to signal voltages on the address and data lines, which normally switch between Vcc and ground, and should only conduct under fault conditions (e.g. for a 5V system, when the voltage on the line exceeds 5.6V or goes below 0.6V).
During nodal impedance analysis device testing, however, the nodal impedance analysis fault locator applies a sinusoidal signal to a node under test which will cause each diode to conduct at its maximum positive and negative excursions. Using the PFL Junction range the resulting signature will appear as shown below.
Address/data line signature
You can think of the signature above as a composite of three elements a horizontal component where no conduction occurs and two sloping portions showing where the protection diodes conduct.
The operator will usually look at all the bus lines during testing; all address and data lines will typically display similar signatures. A bus line with a signature significantly different from the others will alert the operator to a fault on the line, often indicating damage to the input protection circuitry. For example, an open circuit line will appear horizontal.
However, on such configurations, even Junction range will not display conspicuous differences in signatures if, for example, two data or address lines are shorted.
locating on high speed bus lines
The bus lines on many high speed bus-based circuits are designed using transmission lines techniques and employ terminating resistors (often referred to as bus pull ups) for impedance matching, as shown below. The pull up resistor appears in parallel with the device input protection circuits.
The nodal impedance analysis fault locator now has to drive current through the bus pull up resistor so the horizontal component of the signature possesses an easily discernible gradient which will depend on the value of the pull up resistor.
|Locating shorted bus lines
If two or more of the bus lines are shorted the pull up resistors appear in parallel so the resulting gradient is markedly steeper. The signature will appear similar to that below:
|Adding pull ups via test clips
Where pull ups are not used on the board under test, you can quickly construct a test clip or fixture to add them. This simple technique can add an inexpensive but powerful diagnostic facility to your Polar fault locator. The pull ups could be plugged into a spare simm card slot, or clipped over a bus buffer, or any other convenient location where all bus lines are accessible. Experiment with pull up values - we find 2k7 is a good value to try.
Polar Instruments Ltd
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|© Polar Instruments 2002. Polar Instruments pursues a policy of continuous improvement. The specifications in this document may therefore be changed without notice. All trademarks recognised.|