For PCB stackup and transmission line design NEW Speedstack Si
Speedstack Si lossy line field solver and layer stackup design
Speedstack Si includes Si9000e	For a Speedstack evaluation click here

IPC Apex – Rick Hartley interviews Polar's Martyn Gaudion Managing layer stackup across the supply chain with Polar's Speedstack High-speed design consultant Rick Hartley interviews Polar Instruments' Martyn Gaudion at IPC Apex on the subject of Managing layer stackup across the supply chain using Speedstack. Click here to watch the interview


Speedstack Si is a packaged combination of the Si9000 field solving pcb transmission line design system and Speedstack professional layer stackup design software. If you need both powerful and accurate field solvers to predict your pcb performance and layer stackup / buildup documentation the Speedstack Si offers a considerable saving over purchasing separate licences
Speedstack Si is ideal for you if: You need to calculate impedance requirements and model loss on multilayer boards with multiple controlled impedance structures per stack: You need to extract engineering information to drive simulation software, prior to committing a design into production. You need to experiment with differing stack up approaches - for example substitute material in the case of a shortage, and rapidly check (for example) overall height, line width and transmission line impedance values. By employing the link between the Si9000e transmission line design system and Speedstack software you can recalculate all the impedance values in a single pass in a fraction of the time taken traditionally. Should there be a need for any line width alteration the new build information can be rapidly communicated electronically. With a range of license packages to suit your budget Which license is best for me?
Click to enlarge	Clear concise documentation Share and document stackup information in a clear and consistent format. Material usage and graphical stack up views can be printed or shared electronically in a format that is easily read by both interconnect designer and fabricator.
Click to enlarge	Design rules check: Real time design rule check highlights, material mismatch, copper imbalance, RCC foils on inner layers and other design parameters.
Click to enlarge	Your materials: PCB fabricators can build a library of commonly used materials and materials that are normally available from stock along with cost or performance information. Choosing the professional edition of the Speedstack Si allows you to direct import your materials library in text delimited form. This information may be shared with interconnect designers. This means that designers can at a glance choose materials on a basis of cost / lead time / or performance.
For PC system requirements for Speedstack Si see AP605 Allegro^® is registered trade mark of Cadence Design Systems, Inc.