New: Speedstack
PCB Stack up design and documentation

Create and professionally document layer stackups in an instant.

Why create your stackups with Speedstack?
PCB fabricators are discovering that Speedstack slashes stack creation time to a fraction of that taken by traditional methods. Designers also find that Speedstack clarifies and reduces the chances of miscommunication with PCB manufacturers and brokers.

What exactly does Speedstack do for me?
Speedstack allows you to create "live" stacks complete with controlled impedance information, either from generic materials - or from an in house material library of pre preg, core and soldermask. Speedstack takes you from simple geometrical dimensions (thickness layer count, impedance requirements) and automatically generates a stack according to a number of criteria - for example cost, finished thickness, lead time etc.

How?
You are in full control with Speedstack, you can specify the stack as tightly or loosely as you prefer, for routine builds - simply enter the finished thickness and layer count and the controlled impedance specs (if any) and let Speedstack fill in the dielectric heights and appropriate materials. You can - if you like - nominate a preferred core thickness. Or (if you are experienced) take full control of the stack by building manually.  Because using the autostackup feature offers maximum time saving - you may like to discover how it works.  The autostack engine first takes the overall height and assigns nominal layer separations, fine tuning of the dielectric separations then takes place whilst goal seeking to fit in the appropriate controlled impedances. You are then presented with a "traffic light" system to guide you through any areas which are close to specs. Once happy with the initial design the Speedstack engine builds a selection of stacks - typically 10 to 20 - ranked by lead time, cost or finished thickness. Each stack is virtually built 10 000 times in a Monte Carlo analysis to ensure that production yields will be excellent. Choose your preferred stack - and Speedstack makes a final fine tune up of the line widths for the best possible controlled impedance yields. The finished stack may then be emailed across the supply chain and viewed in the Stackup viewer - alternatively a professional report printing utility allows you to print professional reports in a familiar and easy to read style.

What if you continue to use informal methods for stackup creation?
By using informal methods for communicating stackup, you risk a misunderstanding as the stack moves across the supply chain, at best the boards may be slightly out of spec - but still be OK, at worst the boards may be too thick for an edge connector - or have missed transmission line specs and may have to be scrapped and remanufactured.

When you choose Speedstack for layerstack design and communication you will:
- discover that stackup creation takes a fraction of the time of traditional drawing package / word document / or Excel based solutions. You will also produce professional documentation - automatically. Chances of right first time communication increase significantly - and you will experience stack documentation that is clear and concise - whilst fully defining the stack requirements. If you would like to learn more about Speedstack you can call or email us to talk you through, or give you a brief web based presentation. If then you feel that there are powerful benefits for you or your organisation, your local office can set up an evaluation by clicking here

Or if you prefer to read some more - please see below:

Speedstack Viewer

The Speedstack Viewer allows you to view stackups created by Speedstack and the SB200a Stackup Builder. Please contact polarcare@polarinstruments.com to request the version of Speedstack you require.

Materials Libraries 

Material libraries for Speedstack are available exclusively for PolarCare customers from
Polar's supplier partners listed in the
Polar Materials Partner program.

Materials partner program

Speedstack PCB includes Si8000m  (more)
Controlled Impedance design and stackup

Speedstack Si  includes Si9000e (more)
Advanced PCB transmission line design and stackup

With a range of license packages to suit your budget 
Which license is best for me?

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view

Automatic stack generation **(July 07)
Fast stack creation
Clear concise documentation
Base material libraries 

Save time

PCB stackup documentation and control consumes an increasing amount of time for both interconnect designers and PCB front-end engineers. Layer build is shared using an easy to read standard format: .sci

For fabricators:

Now you can document layer stackup rapidly and professionally. Share material types and key stackup related information both within your facility and with your clients.

For interconnect engineers:

At a glance viewing of layer stackup, now you can easily communicate and share information with your preferred fabricator.

For CAD department managers:

Are you managing multiple board vendors?  Or do you simply want an error free transition from prototype to volume quantity?  The Speedstack bundles all the appropriate layer stack information in an easy to digest format.

For EEs:

Is PCB fabrication a "black art" to you?  Speedstack helps you share your requirements with your fabricator (or buyer) thus helping to ensure that you can work with your fabricator to ensure you receive boards that are both as economic as possible, whilst meeting your desired specifications. Now linking to the Si9000e PCB transmission line design system you can also extract loss / RLGC / s-parameters for your proposed stack.

For buyers and brokers:

As a buyer, have you ever received a batch of boards, which appeared OK, only to find that after population the production engineers come back to you complaining that a layer is swapped or the trace impedance is incorrect because of a layer stack problem?  Encouraging your engineering team to supply Speedstack layer stack information files with the manufacturing data will minimise this type of unfortunate and costly mishap.  Sharing stackup with Speedstack simplifies communication between the originating engineering team and the supplier(s).

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A customisable report writer allows you to present stackup documentation in your corporate style..

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Share and document stackup information in a clear and consistent format. Material usage and graphical stack up views can be printed or shared electronically in a format that is easily read by both interconnect designer and fabricator.

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Real time design rule check highlights, material mismatch, copper imbalance, RCC foils on inner layers and other design parameters.
 

Computer

IBM PC compatible

Processor

2GHz Pentium minimum for Speedstack

Windows 2000, Windows XP - (preferred) 

System memory

1GB minimum recommended

Hard disk space required

150MB (min.)

Video standard

SVGA (1280 x 1024 min.)

CDROM drive

Mouse

Microsoft compatible

Link to Si8000 field solver

Requires Si8000m V8.00 and upwards.

Link to Si9000e Transmission line design system

Requires Si9000m V8.00 and upwards.

Important Notes: Speedstack requires Microsoft .NET framework

Test your PC for .NET installation

If this test passes you are ready to install Speedstack.